Figure 28-2. Signal Connections Within The Standard Gpio Port Control Logic (Ports C, D, E, G, H) - Cirrus Logic EP93 Series User Manual

Arm 9 embedded processor family
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GPIO Interface
EP93xx User's Guide
In order to stop any spurious interrupts that may occur during the programming of the
GPIOxINTTYPEx registers, the following sequence should be observed:
1. Disable interrupt by writing to GPIO Interrupt Enable register.
2. Set interrupt type by writing GPIOxINTTYPE1/2 register.
3. Clear interrupt by writing to GPIOxEOI register.
4. Enable interrupt by writing to GPIO Interrupt Enable register.
28
Figure 28-2
28-4
and
Figure 28-3
illustrate the signal connections for GPIO and EGPIO.
Standard GPIO Ports C, D, E, G, and H
DDR
DR
TISR
to PRDATA[7:0]
Figure 28-2. Signal Connections Within the Standard GPIO Port Control Logic
Copyright 2007 Cirrus Logic
OE
DATA
OE
1
0
Register
TESTRDSEL
Read
Select
(Ports C, D, E, G, H)
OE[7:0]
DATA[7:0]
1
0
EP[7:0]
TESTINPSEL
DS785UM1

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