Gpio Pin Map; Table 28-1. Ep9301 And Ep9302 Gpio Port To Pin Map; Table 28-2. Ep9307 Gpio Port To Pin Map - Cirrus Logic EP93 Series User Manual

GPIO Interface
EP93xx User's Guide

28.1.4 GPIO Pin Map

All GPIO signals are mapped to device pins. The Syscon DeviceCfg register contains four
bits that control mapping of the GPIO Ports to device pins: GonK, EonIDE, GonIDE, and
HonIDE.
to EP93xx pins depending on these control signals.
28
1. GRLED is the Green LED pin.
2. RDLED is the Red LED pin.
3. EECLK is the EEPROM clock pin.
28-6
Table 28-1, Table 28-2,

Table 28-1. EP9301 and EP9302 GPIO Port to Pin Map

Pin Name
EGPIO[7:0]
EGPIO[15:8]
1
GRLED
2
RDLED
3
EECLK
4
EEDAT
1. GRLED is the Green LED pin.
2. RDLED is the Red LED pin.
3. EECLK is the EEPROM clock pin.
4. EEDAT is the EEPROM data pin.

Table 28-2. EP9307 GPIO Port to Pin Map

Pin
Name
EGPIO[7:0]
EGPIO[13:8]
EGPIO[15]
1
GRLED
2
RDLED
3
EECLK
4
EEDAT
5
ROW[7:0]
COL[7:0]6
Copyright 2007 Cirrus Logic
Table 28-3, and Table 28-4
Default Function
Port E0
Port E1
Port G0
Port G1
Default
Function
Port A
Port B
Port B
Port E0
Port E1
Port G0
Port G1
ROW[7:0]
COL[7:0]
show how the GPIO ports map
Port A
Port B
Function in
GonK
Mode
Port A
Port B
Port B
Port E0
Port E1
Port G0
Port G1
Port C
Port D
DS785UM1