Cirrus Logic EP93 Series User Manual page 62

ARM920T Core and Advanced High-Speed Bus (AHB)
EP93xx User's Guide
2
Address
0x800B_0FE8
0x800B_0FEC
0x800B_0FF0 - 0x800B_0FFC
0x800C_xxxx
0x800C_0000
0x800C_0004
0x800C_0008
0x800C_000C
0x800C_0010
0x800C_0014
0x800C_0018
0x800C_001C
0x800C_0020
0x800C_0030
0x800C_0034
0x800C_0100
0x800C_0104
0x800C_0108
0x800C_010C
0x800C_0110
0x800C_0114
0x800C_0118
0x800C_011C
0x800C_0120
0x800C_0124
0x800C_0128
0x800C_012C
0x800C_0130
0x800C_0134
0x800C_0138
0x800C_013C
0x800C_0200
0x800C_0204
0x800C_0208
0x800C_020C
0x800C_0210
0x800C_0214
0x800C_0218
0x800C_021C
0x800C_0220
0x800C_0224
0x800C_0228
2-24
Table 2-8. Internal Register Map (Continued)
Register Name
VIC1PeriphID2
VIC1PeriphID3
VIC2
VIC2IRQStatus
VIC2FIQStatus
VIC2RawIntr
VIC2IntSelect
VIC2IntEnable
VIC2IntEnClear
VIC2SoftInt
VIC2SoftIntClear
VIC2Protection
VIC2VectAddr
VIC2DefVectAddr
VIC2VectAddr0
VIC2VectAddr1
VIC2VectAddr2
VIC2VectAddr3
VIC2VectAddr4
VIC2VectAddr5
VIC2VectAddr6
VIC2VectAddr7
VIC2VectAddr8
VIC2VectAddr9
VIC2VectAddr10
VIC2VectAddr11
VIC2VectAddr12
VIC2VectAddr13
VIC2VectAddr14
VIC2VectAddr15
VIC2VectCntl0
VIC2VectCntl1
VIC2VectCntl2
VIC2VectCntl3
VIC2VectCntl4
VIC2VectCntl5
VIC2VectCntl6
VIC2VectCntl7
VIC2VectCntl8
VIC2VectCntl9
VIC2VectCntl10
Copyright 2007 Cirrus Logic
Register Description
VIC Identification Register bits 23:16
VIC Identification Register bits 31:24
Reserved
Vectored Interrupt Controller 2 Registers
IRQ status Register
FIQ status Register
Raw interrupt status Register
Interrupt select Register
Interrupt enable Register
Interrupt enable clear Register
Software interrupt Register
Software interrupt clear Register
Protection enable Register
Vector address Register
Default vector address Register
Vector address 0 Register
Vector address 1 Register
Vector address 2 Register
Vector address 3 Register
Vector address 4 Register
Vector address 5 Register
Vector address 6 Register
Vector address 7 Register
Vector address 8 Register
Vector address 9 Register
Vector address 10 Register
Vector address 11 Register
Vector address 12 Register
Vector address 13 Register
Vector address 14 Register
Vector address 15 Register
Vector control 0 Register
Vector control 1 Register
Vector control 2 Register
Vector control3 Register
Vector control 4 Register
Vector control 5 Register
Vector control 6 Register
Vector control 7 Register
Vector control 8 Register
Vector control 9 Register
Vector control 10 Register
SW
Lock
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
DS785UM1