Arm Co-Processor Instruction Format - Cirrus Logic EP93 Series User Manual

MaverickCrunch Co-Processor
EP93xx User's Guide

3.4 ARM Co-Processor Instruction Format

The ARM V4T architecture defines five ARM co-processor instructions:
3
• CDP - Co-processor Data Processing
• LDC - Load Co-processor
• STC - Store Co-processor
• MCR - Move to Co-processor Register from ARM Register
• MRC - Move to ARM Register from Co-processor Register
The co-processor instruction assembler notation is found in the ARM programming manuals
or the Quick Reference Card. (For additional information, see Preface,
Documents" on page
instructions are detailed below.
31 28 27
cond
31 28 27
cond
31 28 27
cond
31 28 27
cond
31 28 27
cond
3-14
P-3) Formats for the above instructions and variants of these
CDP (Co-Processor Data Processing) Instruction Format
24 23 20 19
1110 opcode1
LDC (Load Co-Processor) Instruction Format
25 24 23 22 21 20 19
110 P U N W 1
STC (Store Co-Processor) Instruction Format
25 24 23 22 21 20 19
110 P U N W 0
MCR (Move to Co-Processor from ARM Register) Instruction Format
24 23 21 20 19
1110 opcode1 0
MRC (Move to ARM Register from Co-Processor) Instruction Format
24 23 21 20 19
1110 opcode1 1
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16 15 12 11
CRn CRd
16 15 12 11
Rn CRd
16 15 12 11
Rn CRd
16 15 12 11
CRn Rd
16 15 12 11
CRn Rd
"Reference
8 7 5 4 3
cp num opcode2 0
8 7
cp num offset
8 7
cp num offset
8 7 5 4 3
cp num opcode2 1
8 7 5 4 3
cp num opcode2 1
0
CRm
0
0
0
CRm
0
CRm
DS785UM1