Irda Integration Information; Enabling Infrared Modes; Clocking Requirements; Table 17-5. Uart2 / Irda Modes - Cirrus Logic EP93 Series User Manual

17.5.4 IrDA Integration Information

17.5.4.1 Enabling Infrared Modes

Mode
Disabled
UART2
SIR
MIR
FIR

17.5.4.2 Clocking Requirements

There are four clocks, PCLK, MIRCLK, FIRCLK, and UARTCLK.
Version 1.1 of the Infrared Data Association standard indicates the following:
• FIRCLK must by 48.0 MHz with a tolerance of 0.01%.
• MIRCLK must be 18.432 MHz with a tolerance of 0.1%.
The worst case ratio that can be supported for PCLK:FIRCLK is a ratio of 1:5. The maximum
that PCLK can be is 66 MHz, therefore:
Any frequencies outside the above range are not supported and will result in incorrect
behavior of the FIR mode of the infrared peripheral.
Since MIRCLK is 18.432 MHz, PCLK can be as low as 3.68 MHz and as high as 66 MHz. Any
PCLK frequency in this range is allowable. Any PCLK frequencies outside the range are not
supported and will result in incorrect behavior of the MIR mode of the infrared peripheral,
therefore:
The tolerance of UARTCLK is defined by the UART to which it is connected.
UARTCLK frequency must accommodate the desired range of baud rates:
The frequency of UARTCLK must also be within the required error limits for all baud rates to
be used.
DS785UM1

Table 17-5. UART2 / IrDA Modes

DeviceCfg Register
U2EN IonU2 SIREn
0 x
1 0
1 1
x 1
x 1
1
<
-- - F F
FIRCLK
5
≤
3.68MHz F
≥
F
UARTCLK
MIN
≤ ×
F 32
UARTCLK
MAX
Copyright 2007 Cirrus Logic
UART2Ctrl Register
UARTE
0 0
0 1
1 1
0 0
0 0
<
66.0MHz
PCLK
≤
66.0MHz
PCLK
×
32 baudrate
MAX
× audrate
65536 b
MIN
EP93xx User's Guide
IrEnable Register
EN[1] EN[0]
0 0
0 0
0 1
1 0
1 1
IrDA
17
17-21