Pcmcia Configuration Registers (Ep9315 Processor Only) - Cirrus Logic EP93 Series User Manual

EBIBRKDIS:

12.6.2 PCMCIA Configuration Registers (EP9315 Processor Only)

The SMC has additional functionality to support a PC-card in Memory Bank 4. Memory Bank
4 has three registers to control wait-states and device width for attribute, common memory
and IO address spaces; and a single PCMCIA control register to provide global control for the
card.
PCAttribute
31 30 29 28
WA
15 14 13 12
RSVD
Address: 0x8008_0020 - Read/Write
Default: 0x0000_0000
Definition: PC Card Attribute register
Bit Descriptions:
RSVD:
WA:
AA:
DS785UM1
EBI Break Disable - Read/Write
The value written to this bit specifies the circumstances for
when the SMC will release the external memory bus:
0 - The SMC releases the external memory bus at the end
of each access to this memory bank
1 - The SMC releases the external memory bus after it has
completed all pending accesses to this memory bank
27 26 25 24
RSVD
11 10 9 8
HA
Reserved - Unknown During Read
Attribute Space Width - Read/Write
The value written to this bit specifies the bus-width of the
Attribute space:
0 - 8-bit wide Attribute space
1 - 16-bit wide Attribute space
Attribute Space Access time - Read/Write
The value written to this field specifies the minimum
'number of HCLK cycles, minus 1' that the data strobe,
MCDAENn
Copyright 2007 Cirrus Logic
23 22 21 20
AA
7 6 5 4
PA
is asserted during a Read or Write access.
,
Static Memory Controller
EP93xx User's Guide
19 18 17 16
3 2 1 0
12-13
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