Cirrus Logic EP93 Series User Manual page 107

Mnemonic:
CFCMPS<cond> Rd, CRn, CRm
Bit Definitions:
CRn:
CRm:
Rd:
Compare Double Precision Floating Point
31:28 27:24
cond 1 1 1 0
Definition:
Compares two double precision floating point numbers and stores an integer
representing the result in the ARM920T register; the highest four bits of the
integer result match the N, Z, C, and V bits, respectively, in the ARM920T's
program status register, while the bottom 28 bits are zeros. If Rd = 15, then the
four status bits are stored in the ARM status register, CPSR.
Mnemonic:
CFCMPD<cond> Rd, CRn, CRm
Bit Definitions:
CRn:
CRm:
Rd:
Compare 32-bit Integers
31:28 27:24
cond 1 1 1 0
Definition:
Compares two 32-bit integers and stores an integer representing the result in
the ARM920T register; the highest four bits of the integer result match the N,
Z, C, and V bits, respectively, in the ARM920T's program status register, while
the bottom 28 bits are zeros. If Rd = 15, then the four status bits are stored in
the ARM status register, CPSR.
Mnemonic:
CFCMP32<cond> Rd, CRn, CRm
Bit Definitions:
CRn:
CRm:
DS785UM1
First source register
Second source register
Destination ARM register. If Rd = 15, destination is ARM
N, C, Z, and V flags.
23:22 21 20 19:16
0 0 0 1 CRn
First source register
Second source register
Destination ARM register. If Rd = 15, destination is ARM
N, C, Z, and V flags.
23:22 21 20 19:16
0 0 0 1 CRn
First source register
Second source register
Copyright 2007 Cirrus Logic
MaverickCrunch Co-Processor
15:12 11:8
Rd 0 1 0 0 1 0 1
15:12 11:8
Rd 0 1 0 1 1 0 0
EP93xx User's Guide
7:5 4 3:0
1 CRm
7:5 4 3:0
1 CRm
3-37
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