Table 3-3. Comparison Relationships And Their Results; Table 3-4. Arm® Condition Codes And Crunch Compare Results - Cirrus Logic EP93 Series User Manual

condition code field of any subsequent ARM instruction to gate the execution of that
instruction based on the result of a Crunch compare operation.
Table 3-3 illustrates the legal relationships and, for each one, the values written to the FCC
bits and the NZCV flags. The FCC bits and the NZCV flags provide the same information, but
in different ways and in different places. Their values depend only on the relationship
between the operands, regardless of whether the operands are considered signed integer,
unsigned integer, or floating point. The unordered relationship can only apply to floating point
operands.
Relationship
The NZCV flags are not computed exactly as with integer comparisons using the ARM CMP
instruction. Hence, when examining the result of Crunch comparisons, the condition codes
field of ARM instructions should be interpreted differently, as shown in
six condition codes should be used whether the comparison operands were signed integers,
unsigned integers, or floating point. No other condition codes are meaningful.
Table 3-4. ARM ® Condition Codes and Crunch Compare Results
Condition Code
Opcode[31:28] Mnemonic
0000
0001
1010
1011
1100
1101
1110
1111
DS785UM1

Table 3-3. Comparison Relationships and Their Results

=
A B
<
A B
>
A B
Unordered
Relationship
EQ
A = B
≠
NE
A B
≥
GE
A B
<
LT A B
>
GT
A B
≤
LE A
B
AL N/A
NV N/A
Copyright 2007 Cirrus Logic
FCC[1:0]
00
01
10
11
ARM Meaning
Equal
Not Equal
Signed Greater Than or Equal Greater Than or Equal
Signed Less Than
Signed Greater Than
Signed Less Than or Equal
Always (unconditional)
Never
MaverickCrunch Co-Processor
EP93xx User's Guide
NCZV
0100
1000
1001
0000
Table 3-4. The same
Crunch Meaning
Equal
Not Equal
Less Than
Greater Than
Less Than or Equal
Always (unconditional)
Never
3
3-7