Table 13-11. EP93xx SDRAM Address Ranges (16-Bit Wide Data Systems) (Continued)
Device
Size,
Address
Organization
Type
Matrix
System
512 Mbit (2 x
13 x 10 x
16-bit wide
32-Bit Wide
4 banks
device)
Data Systems
(Continued)
Note: , the letter "N" represents four additional address bits used for chip select. See
SROMLL = 0
Total
Bank
Continuous Address
Size
Range (see Note)
0xN300_0000 - 0xN37F_FFFF
0xN400_0000 - 0xN47F_FFFF
0xN500_0000 - 0xN57F_FFFF
0xN600_0000 - 0xN67F_FFFF
0xN700_0000 - 0xN77F_FFFF
128
0xN800_0000 - 0xN87F_FFFF
Mbytes
0xN900_0000 - 0xN97F_FFFF
0xNA00_0000 - 0xNA7F_FFFF
0xNB00_0000 - 0xNB7F_FFFF
0xNC00_0000 - 0xNC7F_FFFF
0xND00_0000 - 0xND7F_FFFF
0xNE00_0000 - 0xNE7F_FFFF
0xNF00_0000 - 0xNF7F_FFFF
SROMLL = 1
Size of
Continuous Address
Segment
Range (see Note)
8 Mbytes
0xN000_0000 - 0xN7FF_FFFF
Table
13-12.
Size of
Segment
128
Mbytes
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