Cirrus Logic EP93 Series User Manual page 671

I2STX2Lft
31 30 29 28
15 14 13 12
Address:
0x8082_0020 - Read/Write
Default:
0x0000_0000
Definition:
Transmit left data word for channel 2.
Bit Descriptions:
i2s_tx2_left:
I2STX2Rt
31 30 29 28
15 14 13 12
Address:
0x8082_0024 - Read/Write
Default:
0x0000_0000
Definition:
Transmit right data word for channel 2.
Bit Descriptions:
i2s_tx2_right:
DS785UM1
27 26 25 24
i2s_tx2_left
11 10 9 8
i2s_tx2_left
Transmit left data word for channel 2.
27 26 25 24
i2s_tx2_right
11 10 9 8
i2s_tx2_right
Transmit right data word for channel 2.
Copyright 2007 Cirrus Logic
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7 6 5 4
23 22 21 20
7 6 5 4
2
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EP93xx User's Guide
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