Texas Instruments Synchronous Serial Frame Format; Figure 23-1. Texas Instruments Synchronous Serial Frame Format (Single Transfer); Figure 23-2. Ti Synchronous Serial Frame Format (Continuous Transfer) - Cirrus Logic EP93 Series User Manual

Synchronous Serial Port
EP93xx User's Guide
23.5.5 Texas Instruments
Figure 23-1
transmitted frame.
23
In this mode, SCLKOUT and SFRMOUT are forced LOW, and the transmit data line SSPTXD
is put in the high impedance state whenever the SSP is idle. Once the bottom entry of the
transmit FIFO contains data, SFRMOUT is pulsed HIGH for one SCLKOUT period. The value
to be transmitted is also transferred from the transmit FIFO to the serial shift register of the
transmit logic. On the next rising edge of SCLKOUT, the MSB of the 4 to 16-bit data frame is
shifted out on the SSPTXD pin. Likewise, the MSB of the received data is shifted onto the
SSPRXD pin by the off-chip serial slave device.
Both the SSP and the off-chip serial slave device then clock each data bit into their serial
shifter on the falling edge of each SCLKOUT. The received data is transferred from the serial
shifter to the receive FIFO on the first rising edge of SCLKOUT after the LSB has been
latched.
back-to-back frames are transmitted.
SFRMOUT /
SSPOE (=0)
23-4
®
shows the Texas Instruments synchronous serial frame format for a single
SCLKOUT /
SCLKIN
SFRMOUT /
SFRMIN
SSPTXD /
SSPRXD
SSPOE

Figure 23-1. Texas Instruments Synchronous Serial Frame Format (Single Transfer)

Figure 23-2 shows the Texas Instruments synchronous serial frame format when
SCLKOUT /
SCLKIN
SFRMIN
SSPTXD /
SSPRXD

Figure 23-2. TI Synchronous Serial Frame Format (Continuous Transfer)

Synchronous Serial Frame Format
M S B
4 t o 16 bi t s
MS B
4 t o 16 bi t s
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LSB
LSB
DS785UM1