Cirrus Logic EP93 Series User Manual page 633

RFC:
RFS:
TAB:
TFC:
TFS:
FIIR
31 30 29 28
15 14 13 12
Address:
0x808B_0188 - Read Only
Default:
0x0000_0000
Definition:
FIR Interrupt Register. An interrupt is signalled from this block if any bit is high
in the FIIR.
Bit Descriptions:
RSVD:
RFL:
RIL:
RFC:
RFS:
TAB:
TFC:
TFS:
DS785UM1
RFC mask bit. When high, the FIR RFC status can
generate an interrupt.
RFS mask bit. When high, the FIR RFS status can
generate an interrupt.
TAB mask bit. When high, the FIR TAB status can
generate an interrupt.
TFC mask bit. When high, the FIR TFC status can
generate an interrupt.
TFS mask bit. When high, the FIR TFS status can
generate an interrupt.
27 26 25 24
RSVD
11 10 9 8
RSVD
Reserved. Unknown During Read.
Logical AND of FIR RFL status bit and RFL mask bit.
Logical AND of FIR RIL status bit and RIL mask bit.
Logical AND of FIR RFC status bit and RFC mask bit.
Logical AND of FIR RFS status bit and RFS mask bit.
Logical AND of FIR TAB status bit and TAB mask bit.
Logical AND of FIR TFC status bit and TFC mask bit.
Logical AND of FIR TFS status bit and TFS mask bit.
Copyright 2007 Cirrus Logic
23 22 21 20
7 6 5 4
RFL RIL RFC
IrDA
EP93xx User's Guide
19 18 17 16
3 2 1 0
RFS TAB TFC TFS
17-37
17