Cirrus Logic EP93 Series User Manual page 726

Synchronous Serial Port
EP93xx User's Guide
23
SSPCR1
31 30
15 14
Address:
23-14
SCR:
SPH:
SPO:
FRF:
DSS:
29 28 27 26
13 12 11 10
RSVD
0x808A_0004 - Read/Write
Copyright 2007 Cirrus Logic
Serial clock rate. The value SCR is used to generate the
transmit and receive bit rate of the SSP. SCR is a value
from 0 to 255. This provides the secondary divide of
(1+SCR) after a pre divide of CPSDVSR (ranging from 2 to
254)
SCLKOUT phase (applicable to Motorola SPI frame format
only).
SCLKOUT polarity (applicable to Motorola SPI frame
format only).
Frame format:
00 Motorola SPI frame format
01 - TI synchronous serial frame format
10 - National Semiconductor Microwire frame format
11 - Reserved, undefined operation
Data Size Select:
0000 - Reserved, undefined operation
0001 - Reserved, undefined operation
0010 - Reserved, undefined operation
0011 - 4-bit data
0100 - 5-bit data
0101 - 6-bit data
0110 - 7-bit data
0111 - 8-bit data
1000 - 9-bit data
1001 - 10-bit data
1010 - 11-bit data
1011 - 12-bit data
1100 - 13-bit data
1101 - 14-bit data
1110 - 15-bit data
1111 - 16-bit data
25 24 23 22
RSVD
9 8 7 6
SOD
21 20 19 18
5 4 3 2
MS SSE LBM RORIE
17 16
1 0
TIE RIE
DS785UM1