Table 22-1. Ac'97 Input And Output Signals - Cirrus Logic EP93 Series User Manual

22.1 Introduction
The AC'97 Controller includes a 5-pin serial interface to an external audio codec. The AC-
Link is a bi-directional, fixed rate, serial PCM (Pulse Code Modulation) digital stream, dividing
each audio frame into 12 outgoing and 12 incoming data streams (slots), each with 20-bit
sample resolution.
The AC'97 Controller contains logic that controls the AC-Link to the audio codec and an
interface to the AMBA APB.
The main features of the AC'97 are:
• Serial-to-parallel conversion on data received from the external codec.
• Parallel-to-serial conversion on data transmitted to the external codec.
• Reception / Transmission of control and status information.
• Supports up to 4 different sampling rates at a time with 4 transmit and 4 receive
channels. The transmit and receive paths are buffered with internal FIFO memories
allowing data to be stored independently in both transmit and receive modes. The data
for the FIFOs can be written via either the APB interface or the DMA channels (1-3).
Table 22-1 lists the input and output signals for the AC'97 controller.
Signal Name Input/Output
SDATAIN
BITCLK
SDATAOUT
SYNC
RESET
The AC'97 pins are multiplexed and may be used for the I
setting DeviceCfg.I2SonAC97.
The AC'97 Controller can support up to four different sampling rates at a time. To allow the
controller to support all slots per frame, it has been assumed that the sampling rate for each
different type of data are the same. For example, all audio data are at the same sampling rate
DS785UM1

Table 22-1. AC'97 Input and Output Signals

Serial input data stream from the audio codec. It contains status
Input
information and digital audio input streams.
Input Clock from serial codec. Fixed at 12.288 MHz.
This serial output transmits the control information and digital audio
Output
output streams to the audio codec.
Synchronization signal to the external codec. Fixed at 48 kHz. It is also
Output
output asynchronously when the audio codec is in warm reset state.
Output Asynchronous cold reset (active low, resets codec registers).
Copyright 2007 Cirrus Logic
22AC'97 Controller
Description
2
S controller instead of AC'97 by
Chapter 22
22
22-1