Cirrus Logic EP93 Series User Manual page 678

2
I S Controller
EP93xx User's Guide
I2SRX2Rt
31 30
15 14
21
Address:
Default:
Definition:
Bit Descriptions:
I2SRXLinCtrlData
31 30
15 14
Address:
Default:
Definition:
Bit Descriptions:
21-22
29 28 27 26
13 12 11 10
0x8082_0054 - Read Only
0x0000_0000
Receive right data word for channel 2.
i2s_rx2_right:
29 28 27 26 25
13 12 11 10
0x8082_0058 - Read/Write
0x0000_0000
Receive Line Control Data Register
RSVD:
Left_Right_Justify: Receiver Data word Justification when being received on
25 24 23 22
i2s_rx2_right
9 8 7 6
i2s_rx2_right
Receive right data word for channel 2.
24 23 22 21
RSVD
9 8 7 6
RSVD
Reserved. Unknown During Read. Must be written as "0".
the SDI line input.
0 - Left justification.
1 - Right justification.
Copyright 2007 Cirrus Logic
21 20 19
5 4 3
20 19 18
5 4 3 2
Left_Right_Justify
18 17 16
2 1 0
17 16
1 0
RXDIR
DS785UM1