Chapter 6. Vectored Interrupt Controller; Interrupt Priority; Figure 6-1. Vectored Interrupt Controller Block Diagram - Cirrus Logic EP93 Series User Manual

Arm 9 embedded processor family
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Vectored Interrupt Controller
EP93xx User's Guide
6
VICINTSOURCE[63:32]
VIC1
VICINTSOURCE[31:0]

6.1.1 Interrupt Priority

A FIQ interrupt has the highest priority (because the ARM9 core will always treat FIQ as
higher priority), followed by vectored interrupt 0 to vectored interrupt 15. Non-vectored IRQ
interrupts have the lowest priority. Any of the non-vectored Interrupts can be either FIQ or
IRQ (the interrupt type is determined by programming the appropriate register,
'VICxIntSelect' on page
6-2
Vector Address and
Priority Logic
2
1
VIC0

Figure 6-1. Vectored Interrupt Controller Block Diagram

6-11).
Vector Addr from VIC1
2
FIQ from VIC1
IRQ from VIC1
2
VIC Daisy Chain
Vector Address and Priority
Logic
Copyright 2007 Cirrus Logic
2
IRQ
FIQ
ARM920T
DS785UM1

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