Cirrus Logic EP93 Series User Manual page 703

Arm 9 embedded processor family
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AC97IEx
31
30
29
28
15
14
13
12
Address:
AC97IE1 - 0x8088_0018 - Read/Write
AC97IE2 - 0x8088_0038 - Read/Write
AC97IE3 - 0x8088_0058 - Read/Write
AC97IE4 - 0x8088_0078 - Read/Write
Definition:
Interrupt Enable Register. The AC97IE registers control the Interrupt Enables
for the FIFOs within the controller. All bits are cleared on reset.
Bit Descriptions:
RSVD:
RIE:
TIE:
RTIE:
TCIE:
AC97S1Data
31
30
29
28
15
14
13
12
Address:
0x8088_0080 - Read/Write
Definition:
Slot 1 Data Register. The AC97S1Data register is a read / write register. When
a write has occurred to this register, the data contained within it is sent on the
DS785UM1
27
26
25
24
RSVD
11
10
9
8
RSVD
Reserved. Unknown During Read.
Receive Interrupt Enable - If this bit is set to "1", the FIFO
receive interrupt is enabled.
Transmit Interrupt Enable - If this bit is set to "1", the FIFO
transmit interrupt is enabled.
Receive Timeout Interrupt Enable - If this bit is set to "1",
the FIFO receive timeout interrupt is enabled.
Transmit Complete Interrupt Enable - If this bit is set to "1",
the FIFO transmit complete interrupt is enabled.
27
26
25
24
RSVD
11
10
9
8
RSVD
Copyright 2007 Cirrus Logic
23
22
21
20
7
6
5
4
23
22
21
20
7
6
5
4
AC'97 Controller
EP93xx User's Guide
19
18
17
16
3
2
1
0
RIE
TIE
RTIE
TCIE
19
18
17
16
3
2
1
0
DATA
22-15
22

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