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0x8001_00A8
0x8001_00AC
0x8001_00B0
0x8001_00B4
0x8001_00B6
0x8001_00B8
0x8001_00BC
0x8001_00C0
0x8001_00C4
0x8001_00C6
0x8001_00C8
0x8001_00D0
0x8001_00D4
0x8001_00D8
0x8001_00DC
0x8001_00E0
0x8001_00E4
0x8001_00E8
0x8001_00EC
0x8001_0100 -
0x8001_010C
0x8001_4000 -
0x8001_FFFF
Control Register Description
RXCtl
31
30
29
28
15
14
13
12
RSVD
RCRCA
RA
Address:
0x8001_0000 - Read/Write
DS785UM1
Table 9-3. Ethernet Register List (Continued)
Address
Name
RXStsQCurA
dd
RXStsEnq
TXDQBAdd
TXDQBLen
TXDQCurLe
n
TXDQCurAd
d
TXDEnq
TXStsQBAdd
TXStsQBLen
TXStsQCurL
en
TXStsQCurA
dd
RXBufThrshl
d
TXBufThrshl
d
RXStsThrshl
d
TXStsThrshld
RXDThrshld
TXDThrshld
MaxFrmLen
RXHdrLen
MACFIFO
27
26
25
RSVD
11
10
9
PA
BA
MA
IAHA
Copyright 2007 Cirrus Logic
1/10/100 Mbps Ethernet LAN Controller
Description
MAC Receive Status Queue Current Address Register
MAC Receive Status Enqueue Register
MAC Transmit Descriptor Queue Base Address Register
MAC Transmit Descriptor Queue Base Length Register
MAC Transmit Descriptor Queue Current Length
Register
MAC Transmit Descriptor Current Address Register
MAC Transmit Descriptor Enqueue Register
MAC Transmit Status Queue Base Address Register
MAC Transmit Status Queue Base Length Register
MAC Transmit Status Queue Current Length Register
MAC Transmit Status Queue Current Address Register
MAC Receive Buffer Threshold Register
MAC Transmit Buffer Threshold Register
MAC Receive Status Threshold Register
MAC Transmit Status Threshold Register
MAC Receive Descriptor Threshold Register
MAC Transmit Descriptor Threshold Register
MAC Maximum Frame Length Register
MAC Receive Header Length Register
Reserved
MAC FIFO RAM
24
23
22
21
8
7
6
5
RSVD
EP93xx User's Guide
20
19
18
17
PauseA
RxFCE1
RxFCE0
BCRC
4
3
2
1
IA3
IA2
IA1
9
16
SRxON
0
IA0
9-41
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