Cirrus Logic EP93 Series User Manual page 355

IndAd
47 46 45 44
31 30 29 28
15 14 13 12
Address:
0x8001_0050 through 0x8001_0055 - 6 Bytes - Read/Write,
when AFP = 000b, 010b or 001b
Chip Reset:
0x0000_0000
Soft Reset:
Unchanged
Definition:
Individual Address Register. There are five different Individual Addresses
accessible at offset 0x050, the Address Filter Pointer determines which one is
accessed at any one time. The first four addresses (pointer offset 0x000
through 0x011), may be used to implement destination address filters for
receive frames. The first two may also be used to qualify receive frames for
flow control processing, and the first address is used for wake-up frame
processing. The fifth address (pointer offset 0x110), is only used as the
destination address for transmit pause frames.
The least significant byte of the Individual Address corresponds to the first
byte of the address on the serial interface, with the least significant bit of the
byte corresponding to the first bit on the serial interface.
Bit Descriptions:
IAD:
DS785UM1
43 42 41 40
IAD
27 26 25 24
IAD
11 10 9 8
IAD
Individual Address.
Copyright 2007 Cirrus Logic
1/10/100 Mbps Ethernet LAN Controller
39 38 37 36
23 22 21 20
7 6 5 4
EP93xx User's Guide
35 34 33 32
19 18 17 16
3 2 1 0
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