Registers - Cirrus Logic EP93 Series User Manual

As another example, assume 230,400 baud (the maximum with a UARTCLK equal to
7.3728 Mhz), 5-bit characters, no parity, one stop bit, and no space between characters.
There are 7 bits per character, so 230,400 / 7 = 32,914 characters per second. Simultaneous
transmitting and receiving implies 65,829 APB characters per second. Using the DMA
interface would result in 16,457 AHB accesses per second, while using the APB to access
the UART leads to 65,829 bus accesses per second.

16.3 Registers

Register Descriptions
UART3Data
31 30 29 28
15 14 13 12
Address:
0x808E_0000 - Read/Write
Default:
0x0000_0000
Definition:
UART3 Data Register
Bit Descriptions:
RSVD:
DATA:
DS785UM1
27 26 25
11 10 9
RSVD
Reserved. Unknown During Read.
UART Data, read for receive data, write for transmit data
For words to be transmitted:
• if the FIFOs are enabled, data written to this location is
pushed onto the transmit FIFO
• if the FIFOs are not enabled, data is stored in the
transmitter holding register (the bottom word of the
transmit FIFO). The write operation initiates transmission
from the UART. The data is prefixed with a start bit,
appended with the appropriate parity bit (if parity is
enabled), and a stop bit. The resultant word is then
transmitted.
For received words:
• if the FIFOs are enabled, the data byte is extracted, and
Copyright 2007 Cirrus Logic
24 23 22 21
RSVD
8 7 6 5
UART3 With HDLC Encoder
EP93xx User's Guide
20 19 18 17
4 3 2 1
DATA
16
16
0
16-3