Register Usage; Breshenham's Algorithm Line Draw; Table 8-20. 24 Bpp Memory Layout For Destination Image - Cirrus Logic EP93 Series User Manual

Note:The word count for this example would be: 6 - 1 = 5 words, since P6 ends in the 6th word.
The word count takes into account the whole pixel, not just the starting location. So,
WIDTH = 0x5 would be written to the
Address 31
0x0058
0x005C
0x0060
0x0064
0x0068
0x006C

8.6 Register Usage

Since some registers have different meanings based on the type of transfer being performed,
the next section will give the use and meaning of the register during the various graphics
transfers.

8.6.1 Breshenham's Algorithm Line Draw

The following sequence describes how to set up the registers that are used for a
Breshenham algorithm line draw:
1. Setup LINEINIT Register
Write YINIT = 0x800 (2048) and XINIT = 0x800 in the
2. Setup LINEPATTERN Register
A. Write desired values to the Pattern (PTRN) and Count (CNT) fields to create solid or
patterned lines. The
value and a 16-bit Pattern (PTRN) that defines 16 pixel on/off patterns for line
functions. CNT specifies the position of the last bit used in the PTRN field starting at
bit 0 of the PTRN field.
B. For a solid line, write CNT = 0xF and PTRN = 0xFFFF to the
register. The solid line will have the color value that is written to the MASK field in
the "BLOCKMASK"
C. For a pattern of 8 'on' pixels and 8 'off' pixels, write CNT = 0xF and PTRN = 0x00FF
to the
written to the MASK field in the
either be transparent as specified by BG = '0' in the
the color value written to the
the "BLOCKCTRL"
consistent for any line regardless of angle.
DS785UM1

Table 8-20. 24 BPP Memory Layout for Destination Image

24 23
P1
P2
P3
P5
P6
P7
"LINEPATTRN"
register.
"LINEPATTRN" register. The 8 'on' pixels would have the color value that is
"BACKGROUND"
register. Using DX/DY line draw, the pattern will be more
Copyright 2007 Cirrus Logic
"BLKDESTWIDTH" register.
16 15
P0 P0
P2 P1
P3 P3
P4 P4
P6 P5
P7 P7
"LINEINIT"
register contains a 4-bit pattern Count (CNT)
"BLOCKMASK" register. The 8 'off' pixels would
"BLOCKCTRL"
register as specified by BG = '1' in
Graphics Accelerator
EP93xx User's Guide
8 7 0
P0
P1
P2
P4
P5
P6
register.
"LINEPATTRN"
register or have
8
8-13