Cirrus Logic EP93 Series User Manual page 705

Arm 9 embedded processor family
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codec, the AC97S2Data register must be written to before the AC97S1Data
register is written.
If a power down is required, then the software must write to SLOT1TX location
address 0x26, which is recorded by the controller. If the AC97S2Data bit 12 is
set, then the controller will go into power down mode.
Bit Descriptions:
RSVD:
DATA:
AC97S12Data
31
30
29
28
15
14
13
12
Address:
0x8088_0088 - Read/Write
Definition:
Slot 12 Data Register. The AC97S12Data register is a read / write register.
Data written to it will be sent on the next available frame in SLOT 12. When
this register is read, the data contained within it is the data that was last
received for SLOT 12.
Bit Descriptions:
RSVD:
DATA:
DS785UM1
Reserved. Unknown During Read.
Read operation: Read data value of the last value written
to this register via the AC-Link interface.
Write operation: Write data value to transmit on slot 2 on
next available frame. Once the data has been transmitted,
it will marked as invalid.
27
26
25
24
RSVD
11
10
9
8
DATA
Reserved. Unknown During Read.
Read operation: Read data value of the last value received
in SLOT 12. Bit 0 is monitored to see if a GPIOINT has
occurred.
Write operation: Write data value to transmit on slot 12 on
next available frame. Once the data has been transmitted
it will marked as invalid.
Copyright 2007 Cirrus Logic
23
22
21
20
7
6
5
4
AC'97 Controller
EP93xx User's Guide
19
18
17
16
DATA
3
2
1
0
22-17
22

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Ep9315Ep9301Ep9302Ep9307Ep9312

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