Floating Point Arithmetic Instructions - Cirrus Logic EP93 Series User Manual

MaverickCrunch Co-Processor
EP93xx User's Guide
3
31:28
cond 1 1 1 0
Description:
Mnemonic:
Bit Definitions:

3.5.7 Floating Point Arithmetic Instructions

31:28
cond
Description:
Mnemonic:
Bit Definitions:
31:28
cond
Description:
Mnemonic:
3-38
Rd:
Compare 64-bit Integers
27:24 23:22 21
0 0 0
Compares two 64-bit integers and stores an integer representing the result in
the ARM920T register; the highest four bits of the integer result match the N,
Z, C, and V bits, respectively, in the ARM920T's program status register, while
the bottom 28 bits are zeros. If Rd = 15, then the four status bits are stored in
the ARM status register, CPSR.
CFCMP64<cond> Rd, CRn, CRm
CRn:
CRm:
Rd:
Single Precision Floating Point Absolute Value
27:24 23:22 21:20
1 1 1 0 0 0
Computes the absolute value of a single precision floating point number:
CRd = |CRn|
CFABSS<cond> CRd, CRn
CRd:
CRn:
Double Precision Floating Point Absolute Value
27:24 23:22 21:20
1 1 1 0 0 0
Computes the absolute value of a double precision floating point number.
CFABSD<cond> CRd, CRn
Destination ARM register. If Rd = 15, destination is ARM
N, C, Z, and V flags.
20 19:16 15:12
1 CRn Rd
First source register
Second source register
Destination ARM register. If Rd = 15, destination is ARM
N, C, Z, and V flags.
19:16 15:12
1 1 CRn CRd
Destination register
Source register
19:16 15:12
1 1 CRn CRd
Copyright 2007 Cirrus Logic
11:8 7:5 4
0 1 0 1 1 0 1 1
11:8 7:5 4
0 1 0 0 0 0 0 0
11:8 7:5 4
0 1 0 0 0 0 1 0
DS785UM1
3:0
CRm
3:0
CRm
3:0
CRm