Motorola Spi Format With Spo=1, Sph=0; Figure 23-6. Motorola Spi Frame Format (Single Transfer) With Spo=1 And Sph=0; Figure 23-7. Motorola Spi Frame Format (Continuous Transfer) With Spo=1 And Sph=0 - Cirrus Logic EP93 Series User Manual

Arm 9 embedded processor family
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Synchronous Serial Port
EP93xx User's Guide

23.5.9 Motorola SPI Format with SPO=1, SPH=0

Single and continuous transmission signal sequences for Motorola SPI format with SPO=1,
SPH=0 are shown in
SCLKOUT /
SCLKIN
23
SFRMOUT /
SFRMIN
SSPRXD
SSPOE
SSPTXD
Note: In
SCLKOUT /
SFRMOUT /
SSPOE (=0)
In this configuration, during idle periods
• the SCLKOUT signal is forced HIGH
• SFRMOUT is forced HIGH
• the transmit data line SSPTXD is arbitrarily forced LOW
• when the SSP is configured as a master, the SSPCTLOE line is driven LOW, enabling
the SCLKOUT pad (active LOW enable)
• when the SSP is configured as a slave, the SSPCTLOE line is driven HIGH, disabling
the SCLKOUT pad (active LOW enable).
23-8
Figure 23-6
MS B
MS B

Figure 23-6. Motorola SPI Frame Format (Single Transfer) with SPO=1 and SPH=0

Figure
23-6, Q is an undefined signal.
SCLKIN
SFRMIN
SSPTXD /
LS B
SSPRXD
Figure 23-7. Motorola SPI Frame Format (Continuous Transfer)
and
Figure
23-7.
4 t o 16 bi t s
MS B
4 t o 16 bi t s
with SPO=1 and SPH=0
Copyright 2007 Cirrus Logic
LS B
LS B
LSB
MS B
Q
DS785UM1

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