Cirrus Logic EP93 Series User Manual page 229

PAGE:
NA:
ScrnLines
31 30 29 28
15 14 13 12
RSVD
Address: 0x8003_0030
Default: 0x0000_0000
Definition: Video Screen Lines Register
Bit Descriptions:
RSVD:
LINES:
LineLength
31 30 29 28
15 14 13 12
RSVD
Address: 0x8003_0034
Default: 0x0000_0000
Definition: Video Line Length Register
Bit Descriptions:
RSVD:
DS785UM1
Raster Engine With Analog/LCD Integrated Timing and Interface
Video Screen Half-page Starting SDRAM Address -
Read/Write
If DSCAN = '1' in the
Half-page Starting SDRAM Address value written to this
field corresponds to the upper left corner of the bottom half
of the video screen.
Not Assigned. Will return written value during a read.
27 26 25 24
RSVD
11 10 9 8
Reserved - Unknown during read
Lines - Read/Write
The Lines value written to this field specifies the number of
lines to be scanned to the display during normal and half-
page mode operation.
27 26 25 24
RSVD
11 10 9 8
Reserved. Unknown during read.
Copyright 2007 Cirrus Logic
PixelMode register, the Video Screen
23 22 21 20
7 6 5 4
LINES
23 22 21 20
7 6 5 4
LEN
EP93xx User's Guide
19 18 17 16
3 2 1 0
19 18 17 16
3 2 1 0
7-47
7