Mitsubishi Electric RD77MS2 User Manual page 22

• Signal state
Signal name
I/O signal PLC READY signal
READY signal
All axis servo ON
Synchronization flag
Axis stop signal
M code ON signal
Error detection signal
BUSY signal
Start complete signal
External signal Forced stop input signal
Stop signal
Upper limit (FLS)
Lower limit (RLS)
*1 The interlock must be provided so that the buffer memory is accessed after Synchronization flag [X1] turns on. When no interlock is
provided, an unexpected value may be read or written.
1 START AND STOP
20
1.1 Start
Signal state
ON
ON
ON
*1
ON
OFF
OFF
OFF
OFF
OFF
ON
OFF
ON
ON
CPU module preparation completed
RD77MS preparation completed
All axis servo ON
The RD77MS buffer memory can be
accessed.
Axis stop signal is OFF
M code ON signal is OFF
There is no error
BUSY signal is OFF
Start complete signal is OFF
There is no forced stop input
Stop signal is OFF
Within limit range
Within limit range
Device
Y0
X0
Y1
X1
[Cd.180] Axis stop
[Md.31] Status: b12
[Md.31] Status: b13
X10 to X1F
[Md.31] Status: b14
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