Samsung S5PC100 User Manual page 1064

DISPLAY CONTROLLER
6.4 PROTECT CONTROL REGISTER(PRTCON, R/W, ADDRESS = 0XEE00_000C)
PRTCON Bit
Reserved [31:12]
DontAddLd [11]
Reserved [10:0]
6.5 VIDEO TIME CONTROL 0 REGISTER (VIDTCON0, R/W, ADDRESS = 0XEE00_ 0010)
VIDTCON0 Bit
VBPDE [31:24]
VBPD [23:16]
VFPD [15:8]
VSPW [7:0]
6.6 VIDEO TIME CONTROL 1 REGISTER (VIDTCON1, R/W, ADDRESS = 0XEE00_ 0014)
VIDTCON1 Bit
VFPDE [31:24]
HBPD [23:16]
HFPD [15:8]
HSPW [7:0]
9.1-50
Reserved (Should be 0)
Protect to update Window's buffer shadow register (xxx_F)
0 = update shadow register per frame
1 = protect to update
(update shadow register at next frame after 'DontAddLd' turns to be
1'b0 )
Note. Wx_VBANK_F, Wx_VBASEU_F, Wx_VBASEL_F,
Wx_PAGEWIDTH_F, Wx_OFFSIZE_F
Reserved (Should be 0)
Vertical back porch is the number of inactive lines at the start of a
frame, after vertical synchronization period. (Only for the even field
of YVU interface)
Vertical back porch is the number of inactive lines at the start of a
frame, after vertical synchronization period.
Vertical front porch is the number of inactive lines at the end of a
frame, before vertical synchronization period.
Vertical sync pulse width determines the VSYNC pulse's high level
width by counting the number of inactive lines.
Vertical front porch is the number of inactive lines at the end of a
frame, before vertical synchronization period. (Only for the even
field of YVU interface)
Horizontal back porch is the number of VCLK periods between the
falling edge of HSYNC and the start of active data.
Horizontal front porch is the number of VCLK periods between the
end of active data and the rising edge of HSYNC.
Horizontal sync pulse width determines the HSYNC pulse's high
level width by counting the number of the VCLK.
S5PC100 USER'S MANUAL (REV1.0)
Description
Description
Description
Reset Value
0
0
0
Reset Value
0x00
0x00
0x00
0x00
Reset Value
0
0x00
0x00
0x00