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Functional Description
19.6.5
MSCAN Time Stamp Register High (TSRH)—MBAR + 0x097C / 0x09FC
R
W
RESET:
READ: Anytime
WRITE: Unimplemented
Bit
Name
0:7
TSR[15:8]
19.6.6
MSCAN Time Stamp Register Low (TSRL)—MBAR + 0x097D / 0x09FD
R
W
RESET:
READ: Anytime
WRITE: Unimplemented
Bit
Name
0:7
TSR[7:0]
19.7
Functional Description
19.7.1
General
This section provides a complete functional description of the MSCAN. It describes each of the features and modes listed in the introduction.
19-26
Table 19-31. MSCAN Time Stamp Register (High Byte)
msb 0
1
2
0
0
0
If TIME bit is enabled, MSCAN writes a special time stamp to respective registers in active
Tx or Rx buffer as soon as a message is acknowledged on the CAN bus. Time stamp is
written on bit sample point for recessive bit of ACK delimiter in CAN frame. If Tx, CPU can
only read time stamp after respective Tx buffer is flagged empty.
Timer value, used for stamping, is taken from a free running internal CAN bit-clock. Timer
overrun is not indicated by MSCAN. Timer is reset (all bits set to 0) during initialization
mode. CPU can only read time stamp registers.
Table 19-32. MSCAN Time Stamp Register (Low Byte)
msb 0
1
2
0
0
0
If TIME bit is enabled, MSCAN writes a special time stamp to respective registers in active
Tx or Rx buffer as soon as message is acknowledged on CAN bus. Time stamp is written
on bit sample point for recessive bit of ACK delimiter in CAN frame. If Tx, CPU can only
read time stamp after respective Tx buffer is flagged empty.
Timer value, used for stamping, is taken from a free running internal CAN bit-clock. Timer
overrun is not indicated by MSCAN. Timer is reset (all bits set to 0) during initialization
mode. CPU can only read time stamp registers.
MPC5200B Users Guide, Rev. 1
3
4
5
6
0
0
0
0
Description
3
4
5
6
0
0
0
0
Description
7 lsb
0
7 lsb
0
Freescale Semiconductor
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