Usb Hc Rh Port2 Status Register—Mbar + 0X1058 - Freescale Semiconductor MPC5200B User Manual

Freescale semiconductor board users guide
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Host Control (HC) Operational Registers
Bits
Name
30
PES
31
CCS
12.4.5.5
USB HC Rh Port2 Status Register—MBAR + 0x1058
This register is controls and reports port events on a per-port basis. The Number of Downstream Ports (NDP) represents the number of
HcRhPortStatus registers that are implemented in hardware. The lower word is used to reflect the port status; the upper word reflects the
status change bits. MPC5200B has NDP = 2, therefore, HcRhPort1Status (MBAR + 1054) and HcRhPort2Status (MBAR + 1058).
Some status bits are implemented with special write behavior. If a transaction (token through handshake) is in progress when a write to change
port status occurs, the resulting port status change is postponed until the transaction completes. Reserved bits should always be written 0.
msb 0
1
R
W
RESET:
0
0
16
17
R
W
RESET:
0
0
12-26
PortEnableStatus (read)—indicates whether the port is enabled or disabled.
The Root Hub may clear this bit when the following conditions are detected:
an overcurrent condition
disconnect event
switched-off power
operational bus error (such as babble)
This change causes PESC to be set. HCD sets this bit by writing SetPortEnable and clears it
by writing ClearPortEnable.
PES cannot be set when CurrentConnectStatus is cleared. If not already set, PES is set at the
completion of a port reset when ResetStatusChange is set or port suspend when
SuspendStatusChange is set.
0 = port is disabled
1 = port is enabled
SetPortEnable (write)—HCD sets PES by writing 1. Writing 0 has no effect.
If CCS is cleared, this write does not set PES, but instead sets CSC. This notifies the driver
that an attempt was made to enable a disconnected port.
CurrentConnectStatus (read)—reflects current state of downstream port.
0 = No device connected
1 = Device connected
ClearPortEnable (write)—HCD writes 1 to this bit to clear PortEnableStatus bit. Writing 0 has
no effect. CCS is not affected by any write.
Note: This bit is always read '1b' when the attached device is non-removable
(DeviceRemoveable[NDP]).
Table 12-23. USB HC Rh Port2 Status Register
2
3
4
5
6
Reserved
0
0
0
0
0
18
19
20
21
22
Reserved
LSDA
0
0
0
0
0
MPC5200B Users Guide, Rev. 1
Description
7
8
9
10
11
PRSC
0
0
0
0
0
23
24
25
26
27
PPS
Reserved
PRS
0
0
0
0
0
12
13
14
15
OCIC PSSC PESC
CSC
0
0
0
0
28
29
30
31 lsb
POCI
PSS
PES
CCS
0
0
0
0
Freescale Semiconductor

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