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Interrupt Controller
7.2.4.3
ICTL Peripheral Priority and HI/LO Select 2 Register —MBAR + 0x0508
Table 7-6. ICTL Peripheral Priority and HI/LO Select 2 Register
msb 0
1
R
Per8_pri
W
RESET:
0
0
16
17
R
Per12_pri
W
RESET:
0
0
Bits
Name
—
Per[x]_pri
0:3
Per8_pri
4:7
Per9_pri
8:11
Per10_pri
12:15
Per11_pri
16:19
Per12_pri
20:23
Per13_pri
24:27
Per14_pri
28:31
Per15_pri
7.2.4.4
ICTL Peripheral Priority and HI/LO Select 3 Register —MBAR + 0x050C
Table 7-7. ICTL Peripheral Priority and HI/LO Select 3 Register
msb 0
1
R
Per16_pri
W
RESET:
0
0
16
17
R
Per20_pri
W
RESET:
0
0
Bits
Name
—
Per[x]_pri
0:3
Per16_pri
4:7
Per17_pri
7-8
2
3
4
5
6
Per9_pri
0
0
0
0
0
18
19
20
21
22
Per13_pri
0
0
0
0
0
Identical to Peripheral_Priority 1 Register, but related to peripheral interrupt sources 8
through 15. All bits are programmable and significant.
Peripheral 8 = PCI Control module
Peripheral 9 = PCI SC Initiator RX
Peripheral 10 = PCI SC Initiator TX
Peripheral 11 = PSC4
Peripheral 12 = PSC5
Peripheral 13 = SPI modf
Peripheral 14 = SPI spif
Peripheral 15 = I2C1
2
3
4
5
6
Per17_pri
0
0
0
0
0
18
19
20
21
22
Per21_pri
0
0
0
0
0
Identical to Peripheral_Priority 2 register, but related to peripheral interrupt sources 16–21.
All bits are programmable and significant.
Peripheral 16 = I2C2
Peripheral 17 = CAN1
MPC5200B Users Guide, Rev. 1
7
8
9
10
11
Per10_pri
0
0
0
0
23
24
25
26
27
Per14_pri
0
0
0
0
Description
7
8
9
10
11
Per18_pri
0
0
0
0
23
24
25
26
27
Per22_pri
0
0
0
0
Description
12
13
14
15
Per11_pri
0
0
0
0
0
28
29
30
31 lsb
Per15_pri
0
0
0
0
0
12
13
14
15
Per19_pri
0
0
0
0
0
28
29
30
31 lsb
Per23_pri
0
0
0
0
0
Freescale Semiconductor
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