Freescale Semiconductor MPC5200B User Manual page 554

Bit Name
0:3 —
4:15 R_PTR
15.2.43 Tx FIFO Write Pointer (0x96)—TFWPTR
msb 0 1
R Reserved
W
RESET: 0 0
Bit Name
0:3 —
4:15 W_PTR
15.2.44 Tx FIFO Last Read Frame (0x9A)—TFLRFPTR
msb 0 1
R Reserved
W
RESET: 0 0
Bit Name
0:3 —
4:15 LFP
15.2.45 Tx FIFO Last Write Frame PTR (0x9C)—TFLWFPTR
msb 0 1
R Reserved
W
RESET: 0 0
Bit Name
0:3 —
4:15 LFP
Freescale Semiconductor
PSC Registers—MBAR + 0x2000, 0x2200, 0x2400, 0x2600, 0x2800, 0x2C00
Reserved
Read pointer.This FIFO-maintained pointer points to the next FIFO location to be read
Table 15-70. Tx FIFO Write Pointer (0x96)
2 3 4 5 6
0 0 0 0 0
Reserved
Write pointer.This FIFO-maintained pointer points to the next FIFO location to be written to
Table 15-71. Tx FIFO Last Read Frame PTR (0x9A)
2 3 4 5 6
0 0 0 0 0
Reserved
Last Frame Pointer. Not applicable to PSC FIFOs, since the PSCs do not recognize frame
formats in the serial data stream
Table 15-72. Tx FIFO Last Write Frame PTR(0x9C)
2 3 4 5 6
0 0 0 0 0
Reserved
Last Frame Pointer. Not applicable to PSC FIFOs, since the PSCs do not recognize frame
formats in the serial data stream
MPC5200B Users Guide, Rev. 1
Description
7 8 9 10 11
W_PTR
0 0 0 0 0
Description
7 8 9 10 11
LFP
0 0 0 0 0
Description
7 8 9 10 11
LFP
0 0 0 0 0
Description
12 13 14 15 lsb
0 0 0 0
12 13 14 15 lsb
0 0 0 0
12 13 14 15 lsb
0 0 0 0
15-43