Freescale Semiconductor MPC5200B User Manual page 188

7.3.2.1.1 GPS Port Configuration Register
msb 0 1
R CS1
W
RESET: 0 0
16
R PCI_DIS USB_SE
W
RESET: 0
Bit Name
0 CS1
1 LPTZ
2:3 ALTs
4 CS7
5 CS6
6:7 ATA
8 IR_USB_CLK
Freescale Semiconductor
Table 7-21. GPS Port Configuration Register
2 3 4 5
ALTs CS7 CS6
0 0 0 0
17 18 19 20 21 22
USB PSC3
0 0 0 0 0
Memory Chip Select bit
0 = gpio_wkup_6
1 = mem_cs1 (second SDRAMC chip select) on gpio_wkup_6 pin
LocalPlus non-muxed TSIZ bit
0 = gpio_wkup_7 and test_sel_1
1 = TSIZ 1 on gpio_wkup_7 and TSIZ 2 on test_sel_1
Alternatives, see Note 2
00 = No Alternatives: CAN1/2 on PSC2 according to PSC2 setting.
SPI on PSC3 according to PSC3 setting.
01 = ALT CAN position: CAN1 on I2C1, CAN2 on Tmr0/1 pins, see Note 1
10 = ALT SPI position: SPI on Tmr2/3/4/5 pins, see Note
11 = Both on ALT
0 = Interrupt GPIO on PSC3_5 (see note 6)
1 = CS7 on PSC3_5
0 = Interrupt GPIO on PSC3_4 (see note 6)
1 = CS6 on PSC3_4
Advanced Technology Attachment
00 = No ATA chip selects, csb_4/5 used as normal chip select
01 = ATA cs0/1 on csb_4/5
10 = ATA cs0/1 on i2c2 clk/io
11 = ATA cs0/1 on Tmr0/1, see Note
Infrared USB Clock
0 = IrDA/USB 48MHz clock generated internally, pin is GPIO
1 = IrDA/USB clock is sourced externally, input only
MPC5200B Users Guide, Rev. 1
—
MBAR + 0x0B00
6 7 8 9 10
ATA IRDA
0 0 0 0 0
23 24 25 26
Rsvd PSC2
0 0 0 0 0
Description
1
General Purpose I/O (GPIO)
11 12 13 14
Ether
0 0 0 0
27 28 29 30 31 lsb
Rsvd PSC1
0 0 0 0
2
15
0
0
7-29