Freescale Semiconductor MPC5200B User Manual page 316

16:23 Window 0
Translation
Address
24:31 Reserved
10.3.2.6 Initiator Window 1 Base/Translation Address Register PCIIW1BTAR(RW) —MBAR +
0x0D74
msb 0 1
R
W
RESET 0 0
16 17
R Window 1 Translation Address
W
RESET 0 0
Freescale Semiconductor
For any translated bit (described above), the corresponding value here will be driven onto
the PCI address bus for the XL bus Window 0 address hit.
Note: The Window Translation operation can not be turned off. If a direct mapping from
XL Bus to PCI space is desired, program the same value to both the Window Base
Address Register and Window Translation Address Register.
Unused bits. Software should write zero to this register.
2 3 4 5 6
Window 1 Base Address
0 0 0 0 0
18 19 20 21 22
0 0 0 0 0
MPC5200B Users Guide, Rev. 1
Table 1.
7 8 9 10
Window 1 Address Mask
0 0 0 0
23 24 25 26
0 0 0 0
Registers
11 12 13 14 15
0 0 0 0
27 28 29 30 31 lsb
Reserved
0 0 0 0
0
0
10-19