Freescale Semiconductor MPC5200B User Manual page 139

MPC5200B Clock Domains
XLB Clock (MHz)
x1
x1.5
x2
x2.5
x3
x3.5
x4
x4.5
x5
x5.5
x6
x6.5
x7
x7.5
x8
Note: 1x and 1.5x multiply ratios are not available in this version of the MPC5200B.
a
Table 5-6, XLB to CORE clock ratio.
See
Table 5-6 gives the e300 Core APLL and operating frequency options compared to the xlb_clk reference input (shown in
selection of an e300 Core frequency is made at Power-On Reset (POR) via the reset configuration inputs. For more information see
Section 4.6, Reset Configuration.
Frequency ranges indicated in Table 5-6
actually performing at these frequency ranges. For data relating to actual performance, see the MPC5200B Hardware Specification.
ppc_pll_cfg
hex [0:1:2:3:4]
0x00 00000
0x01 00001
0x02 00010
0x04 00100
0x05 00101
0x06 00110
0x07 00111
5-6
Table 5-5. e300 Core Frequencies vs. XLB Frequencies
132 108 99
— — —
— — —
264 216 198
330 270 247.5
396 324 297
378 346.5
396
represent possible ranges for the processor APLL. A variety of conditions may prevent the part from
Table 5-6. e300 Core APLL Configuration Options
Bus:Core Ratio
(XLB : CORE CLOCK)
—
—
—
1:2
1:2
1:2.5
1:4.5
MPC5200B Users Guide, Rev. 1
81 66 54 49.5
— — —
— — —
162 132 108 99
202.5 165 135 123.8
243 198 162 148.4
283.5 231 189 173.3
324 264 216 198
364.5 297 243 222.8
330 270 247.5
363 297 272.3
396 324 297
351 321.8
378 346.5
371.3
396
Core:VCO Ratio
(CORE CLOCK: f
VCOcore
—
—
—
1:2
1:4
1:2
1:2
40.5 33
— — —
— — —
81 66
101.3 82.5 67.5
121.5 99
141.8 115.5 94.5
162 132 108
182.3 148.5 121.5
202.5 165 135
222.8 181.5 148.5
243 198 162
263.3 214.5 175.5
283.5 231 189
303.8 247.5 202.5
324 264 216
Figure
Bus:VCO Ratio
) (XLB : f
VCOcore)
—
—
—
1:4
1:8
1:5
1:9
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—
—
54
81
5-2). The