J1850 Vpw Symbols - Freescale Semiconductor MPC5200B User Manual

Freescale semiconductor board users guide
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Functional Description
Active
Passive
Active
Passive
Active
Passive
Active
Passive
Each message will begin with an SOF symbol, an active symbol, and therefore each data byte (including the CRC byte) will begin with a
passive bit, regardless of whether it is a logic one or a logic zero. All VPW bit lengths stated in the following descriptions are typical values
at a 10.4kbps bit rate.
Logic "0"
A logic zero is defined as either an active to passive transition followed by a passive period 64µs in length, or a passive to active
transition followed by an active period 128µs in length
Logic "1"
A logic one is defined as either an active to passive transition followed by a passive period 128µs in length, or a passive to active
transition followed by an active period 64µs in length
NB - Normalization Bit
The NB symbol has the same property as a logic "1" or a logic "0".It is only used in IFR message responses. This bit is defined as
an active bit.
SOF - Start of Frame Symbol
20-18
128µs
Logic "0"
128µs
Logic "1"
200µs
Start of Frame
(c)
280µs
End of Frame
(e)
Active
Passive
Inter-Frame Seperator (IFS)
Figure 20-5. J1850 VPW Symbols
(Figure
MPC5200B Users Guide, Rev. 1
OR
(a)
OR
(b)
End of Data
EOF
EOD
(g)
(Figure
20-5(a)).
20-5(b)).
64µs
64µs
200µs
(d)
≥ 240µs
Break
(f)
20µs
300µs
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