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Table 12-11. USB HC Bulk Head Endpoint Descriptor Register
msb 0
1
R
W
RESET:
0
0
16
17
R
W
RESET:
0
0
Bits
Name
0:27
BHED
28:31
—
12.4.3.6
USB HC Bulk Current Endpoint Descriptor Register—MBAR + 0x102C
The HC Bulk Current Endpoint Descriptor register contains the physical address of the current endpoint of the bulk list. The bulk list is served
in a round-robin fashion, therefore endpoints are ordered according to their insertion into the list.
Table 12-12. USB HC Bulk Current Endpint Descriptor Register
msb 0
1
R
W
RESET:
0
0
16
17
R
W
RESET:
0
0
Bits
Name
0:27
BHED
BulkCurrentED—advances to the next ED after HC has served the present ED.
HC continues processing the list from where it left off in the last Frame. When it reaches the end
of the Bulk List, HC checks the HcCommandStatus BulkListFilled.
•
•
HCD is only allowed to modify this register when HcControl BulkListEnable is cleared. When
set, HCD only reads the instantaneous value of this register. This is initially set to 0 to indicate
the end of the Bulk List.
28:31
—
Reserved
12.4.3.7
USB HC Done Head Register—MBAR + 0x1030
The HC Done Head register contains the physical address of the last completed transfer descriptor that was added to the done queue. In normal
operation, HCD does not need to read this register as its content is periodically written to the HCCA.
Freescale Semiconductor
2
3
4
5
6
0
0
0
0
0
18
19
20
21
22
BHED
0
0
0
0
0
BulkHeadED—HC traverses the Bulk List starting with the HcBulkHeadED pointer. The
content is loaded from HCCA during the HC initialization.
Reserved
2
3
4
5
6
0
0
0
0
0
18
19
20
21
22
BCED
0
0
0
0
0
If set, BHED copies HcBulkHeadED content to HcBulkCurrentED and clears bit.
If not set, it does nothing.
MPC5200B Users Guide, Rev. 1
Host Control (HC) Operational Registers
7
8
9
10
11
BHED
0
0
0
0
23
24
25
26
27
0
0
0
0
Description
7
8
9
10
11
BCED
0
0
0
0
23
24
25
26
27
0
0
0
0
Description
12
13
14
15
0
0
0
0
0
28
29
30
31 lsb
Reserved
0
0
0
0
0
12
13
14
15
0
0
0
0
0
28
29
30
31 lsb
Reserved
0
0
0
0
0
12-15
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