Overload Frames; Time Stamp; Bit Timing - Freescale Semiconductor MCF5480 Reference Manual

When transmitting a remote frame, the user initializes a message buffer as a transmit message buffer with
the RTR bit set to one. Once this remote frame is transmitted successfully, the transmit message buffer
automatically becomes a receive message buffer, with the same ID as the remote frame that was
transmitted.
When a remote frame is received by the FlexCAN, the remote frame ID is compared to the IDs of all
transmit message buffers programmed with a CODE of 1010. If there is an exact matching ID, the data
frame in that message buffer is transmitted. If the RTR bit in the matching transmit message buffer is set,
the FlexCAN will transmit a remote frame as a response.
A received remote frame is not stored in a receive message buffer. It is only used to trigger the automatic
transmission of a frame in response. The mask registers are not used in remote frame ID matching. All ID
bits (except RTR) of the incoming received frame must match for the remote frame to trigger a response
transmission. The matching message buffer immediately enters the internal arbitration process, but is
considered as a normal Tx MB, with no higher priority. The data length of this frame is independent of the
data length code (DLC) field in the remote frame that initiated its transmission.

21.4.7.2 Overload Frames

Overload frame transmissions are not initiated by the FlexCAN unless certain conditions are detected on
the CAN bus. These conditions include the following:
• Detection of a dominant bit in the first or second bit of intermission
• Detection of a dominant bit in the seventh (last) bit of the end-of-frame (EOF) field in receive
frames
• Detection of a dominant bit in the eighth (last) bit of the error frame delimiter or overload frame
delimiter
21.4.8

Time Stamp

The value of the free-running 16-bit timer is sampled at the beginning of the identifier field on the CAN
bus. For a message being received, the time stamp will be stored in the TIMESTAMP entry of the receive
message buffer at the time the message is written into that buffer. For a message being transmitted, the
TIMESTAMP entry will be written into the transmit message buffer once the transmission has completed
successfully.
The free-running timer can optionally be reset upon the reception of a frame into message buffer 0. This
feature allows network time synchronization to be performed.
21.4.9

Bit Timing

The FlexCAN module CANCTRL configures the bit timing parameters required by the CAN protocol.
The PRESDIV, RJW, PSEG1, PSEG2, and the PROPSEG fields allow the user to configure the bit timing
parameters.
The prescaler divide field (PRESDIV) allows the user to select the ratio used to derive the S-clock from
the system clock. The time quanta clock operates at the S-clock frequency.
The PRESDIV field controls a prescaler that generates the Serial Clock (Sclock), whose period defines the
"time quantum" used to compose the CAN waveform. A time quantum is the atomic unit of time handled
by the CAN engine.
A bit time is subdivided into three segments
21-28
1
(reference Figure 21-14
MCF548x Reference Manual, Rev. 3
and Table 21-16):
Freescale Semiconductor