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If a BREAK symbol is received while the BDLC module is transmitting or receiving, the symbol invalid or out of range flag (in
BDLC State Vector Register) is set. Further transmission/reception will be disabled until the J1850 bus returns to the passive state
and a valid EOF symbol is detected on the J1850 bus. If the interrupt enable bit (IE in BDLC Control Register 1) is set, an interrupt
request from the BDLC module is generated. Reading the BDLC State Vector Register register will clear this flag.
The BDLC module can transmit a BREAK symbol. And it can receive a BREAK symbol from the J1850 bus.
•
Bus Error Summary
The possible J1850 bus errors and the actions taken by the BDLC module are summarized in
Error Condition
Transmission Error
Cyclical Redundancy Check (CRC)
Error
Symbol Error
Framing Error
Bus short to V
DD
Bus short to GND.
BREAK symbol reception
20.8.2
Mux Interface
The MUX Interface is responsible for bit encoding/decoding and digital noise filtering between the Protocol Handler and the Physical
Interface. Refer to
Figure
20-2.
20.8.2.1
Mux Interface - Rx Digital Filter
The Receiver section of the BDLC module includes a digital low pass filter to remove narrow noise pulses from the incoming message. An
outline of the digital filter is shown in
Freescale Semiconductor
Table 20-19. BDLC module J1850 Error Summary
BDLC module will immediately cease transmitting. Further
transmission and reception will be disabled until a valid EOF symbol
is detected. The symbol invalid or out of range flag will be set and
interrupt generated if enabled.
CRC error flag set and interrupt generated if enabled.
The symbol invalid or out of range flag will be set and interrupt
generated if enabled. Transmission and reception will be disabled
until a valid EOF symbol is detected.
The symbol invalid or out of range flag will be set and interrupt
generated if enabled. Transmission and reception will be disabled
until a valid EOF symbol is detected.
.
The BDLC module will not transmit until short is corrected and a
valid EOF is detected. Depending upon when short occurs and is
corrected, this error condition may set the symbol invalid or out of
range, crc error, or loss of arbitration flags.
Short will be seen as an idle bus by BDLC module. If a transmission
attempt is made before short is corrected, the symbol invalid or out
of range flag will be set and interrupt generated if enabled. Another
transmission can be initiated as soon as short is corrected.
If doing so, the BDLC module will immediately cease transmitting.
Symbol invalid or out of range flag set and interrupt generated if
enabled.Transmission and reception will be disabled until a valid
EOF symbol is detected.
Figure
20-11.
MPC5200B Users Guide, Rev. 1
Table
BDLC Module Function
Functional Description
20-19.
20-27
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