Freescale Semiconductor MPC5200B User Manual page 751

W
VBR . . . . . . . . . . . . . . . . . . . Variable Bit-Rate
VC. . . . . . . . . . . . . . . . . . . . . Virtual Channel, Circuit, Call, or Connection
VCC . . . . . . . . . . . . . . . . . . . Virtual Channel Connection
VCI . . . . . . . . . . . . . . . . . . . . Virtual Circuit Identifier
VCO . . . . . . . . . . . . . . . . . . . Voltage-Controlled Oscillator
VEA . . . . . . . . . . . . . . . . . . . Virtual Environment Architecture—the level of the architecture that describes the memory model for an
environment in which multiple devices can access memory. VEA can:
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•
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ver . . . . . . . . . . . . . . . . . . . . . version
VM . . . . . . . . . . . . . . . . . . . . Virtual Memory—the address space created using the memory management facilities of the processor. Program
access to virtual memory is possible only when it coincides with physical memory.
VP . . . . . . . . . . . . . . . . . . . . . Virtual Path
VPC. . . . . . . . . . . . . . . . . . . . Virtual Path Connection
VPI . . . . . . . . . . . . . . . . . . . . Virtual Path Identifier
W
WAN . . . . . . . . . . . . . . . . . . . Wide Area Network—A computer network that spans a relatively large geographical area. Typically, a WAN
consists of two or more local-area networks (LANs).
Watchpoint . . . . . . . . . . . . . . A reported event, but does not change machine timing.
WE . . . . . . . . . . . . . . . . . . . . Write Enable signals
WKIO . . . . . . . . . . . . . . . . . . GPIO WakeUp
Word . . . . . . . . . . . . . . . . . . . A 32-bit data element.
Note: Other processors may have a different word size.
WR . . . . . . . . . . . . . . . . . . . . Write
Write-back. . . . . . . . . . . . . . . A cache memory update policy in which processor write cycles are directly written only to the cache. External
memory is updated only indirectly. For example, when a modified cache block is cast out to make room for
newer data.
Write-through . . . . . . . . . . . . A cache memory update policy in which all processor write cycles are written to both cache and memory.
X
XCPCI. . . . . . . . . . . . . . . . . . PCI_CFG (PCI configuration)
XER . . . . . . . . . . . . . . . . . . . Register used primarily for indicating conditions such as carries and overflows for integer operations.
XFC. . . . . . . . . . . . . . . . . . . . External Filter Capacitor
XTAL . . . . . . . . . . . . . . . . . . Crystal. See also EXTAL.
VxWorks . . . . . . . . . . . . . . . . From Wind River Systems, is a networked real-time operating system designed to be used in a distributed
environment.
A-12
define aspects of the cache model
define cache control instructions
define the time-base facility from a user perspective.
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor