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BestComm DMA Registers—MBAR+0x1200
Bit
Name
16:23
IPR30
24:31
IPR31
13.15.24 SDMA Requestor MuxControl—MBAR + 0x125C
msb 0
1
R
Req31
W
RESET:
0
0
16
17
R
Req23
W
RESET:
0
0
Bit
Name
0:1
Req31
2:3
Req30
4:5
Req29
6:7
Req28
8:9
Req27
10:11
Req26
13-20
Initiator Priority register for initiator 30.
Same bit layout as IPR0
Initiator Priority register for initiator 31.
Same bit layout as IPR0
Table 13-24. SDMA Request MuxControl
2
3
4
5
6
Req30
Req29
Req28
0
0
0
0
0
18
19
20
21
22
Req22
Req21
Req20
0
0
0
0
0
00: Requestor (RESERVED)
01: GPIO_PSC2_3
10: GPIO_IRDA_1
11: Always Requestor 31
00: Requestor (RESERVED)
01: GPIO_PSC2_2
10: GPIO_IRDA_0
11: Always Requestor 30
00: Requestor (RESERVED)
01: GPIO_PSC2_1
10: GPIO_ETH_3
11: Always Requestor 29
00: Requestor (RESERVED)
01: GPIO_PSC2_0
10: GPIO_ETH_2
11: Always Requestor 28
00: Requestor (RESERVED)
01: GPIO_PSC1_3
10: GPIO_ETH_1
11: Always Requestor 27
00: Requestor IrDA TX (PSC_6)
01: GPIO_PSC1_2
10: GPIO_ETH_0
11: Always Requestor 26
MPC5200B Users Guide, Rev. 1
Description
7
8
9
10
11
Req27
Req26
0
0
0
0
23
24
25
26
27
Req19
Req18
0
0
0
0
Description
12
13
14
15
Req25
Req24
0
0
0
0
0
28
29
30
31 lsb
Req17
Req16
0
0
0
0
0
Freescale Semiconductor
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