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Bit
Name
16:23
IPR14
24:31
IPR15
13.15.20 SDMA Initiator Priority 16 Register—MBAR + 0x124C
SDMA Initiator Priority 17 Register—MBAR + 0x124D
SDMA Initiator Priority 18 Register—MBAR + 0x124E
SDMA Initiator Priority 19 Register—MBAR + 0x124F
msb 0
1
R
W
RESET:
0
0
16
17
R
W
RESET:
0
0
Bit
Name
0:7
IPR16
8:15
IPR17
16:23
IPR18
24:31
IPR19
Freescale Semiconductor
Initiator Priority register for initiator 14 (or Task14 if PtdControl[16]=1)
Same bit layout as IPR0
Initiator Priority register for initiator 15 (or Task15 if PtdControl[16]=1)
Same bit layout as IPR0
Table 13-20. SDMA Initiator Priority 16 Register
SDMA Initiator Priority 17 Register
SDMA Initiator Priority 18 Register
SDMA Initiator Priority 19 Register
2
3
4
5
6
IPR16
0
0
0
0
0
18
19
20
21
22
IPR18
0
0
0
0
0
Initiator Priority register for initiator 16.
Same bit layout as IPR0
Initiator Priority register for initiator 17.
Same bit layout as IPR0
Initiator Priority register for initiator 18.
Same bit layout as IPR0
Initiator Priority register for initiator 19.
Same bit layout as IPR0
MPC5200B Users Guide, Rev. 1
BestComm DMA Registers—MBAR+0x1200
Description
7
8
9
10
11
0
0
0
0
23
24
25
26
27
0
0
0
0
Description
12
13
14
15
IPR17
0
0
0
0
0
28
29
30
31 lsb
IPR19
0
0
0
0
0
13-17
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