Signals And Connections - Freescale Semiconductor MPC5200B User Manual

Freescale semiconductor board users guide
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11.5

Signals and Connections

Signal
I/O
DATA[15:0]
I/O
SA[2:0]
O
CS[1]FX
O
CS[3]FX
O
Signal
I/O
IOW
O
IOR
O
DACK
O
INTRQ
O
ATA_ISOLATION
O
IOCHRDY
I
DRQ
I
RESET
NC1
Note:
1. NC=No Connection
The ATA_ISOLATION output is an active high signal to control external ATA transceiver devices and
to isolate the ATA bus from the Local Plus (shared) bus. The ATA_ISOLATION pin is driven low
immediately after the positive edge of HRESET for 4 PCI_CLK cycles.
This note is only a warning about the behavior of this pin.
Normally, the ATA_ISOLATION pin is used to control an isolation buffer between the LocalPlus Bus
and the ATA bus. Even though this glitch will cause the ATA Isolation Buffer to drive the LocalPlus
Bus for four PCI Clock Cycles, the LocalPlus Bus cannot initiate a bus cycle for approximately 10
cycles after the positive edge of HRESET. Therefore, bus conflict will not occur.
Freescale Semiconductor
Table 11-33. MPC5200B External Signals
Data—16-bit Data Bus (DD pins on ATA cable).
Address—3-bit address, when combined with the two chip-selects, CS1FX and CS3FX, is
used to address Control and Command Block Registers in an ATA drive controller (DA2,
DA1 and DA0 on ATA cable, respectively).
Chip select connected to CS[0] on ATA cable.
Chip select connected to CS[1] on ATA cable.
I/O Write—Active low signal that denotes a WRITE transaction (DIOW on ATA cable).
I/O Read—Active low signal that denotes a READ transaction (DIOR on ATA cable).
DMA Acknowledge (DMACK on ATA cable).
ATA interrupt.
ATA Write Enable to allow sharing of the ATA DD bus with PCI Bus.
I/O Channel Ready (IORDY pin on ATA cable)
DMA Request (DMARQ pin on ATA cable)
Reset—Handled at the board level
NOTE
MPC5200B Users Guide, Rev. 1
Description
Description
Signals and Connections
11-23

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