Freescale Semiconductor MPC5200B User Manual page 281

Programmer's Model
Bits Name
16 MX
17 —
18 AA
19 CE
20:21 AS
22:23 DS
24:25 Bank
26:27 WTyp
9-16
MX bit specifies whether transaction operates as multiplexed or non-multiplexed. A
multiplexed transaction presents address and data in different tenures. During the address
tenure, ALE is asserted. At the end of ALE, AD bus is switched to data tenure and CSx pin
is asserted.
0 = Non-multiplexed
1 = Multiplexed
Reserved
ACK Active—multiplexed transactions only. This bit defines whether ALK input is active or
not. If AA is 1, programmed wait states can be overridden when/if the external device drives
the ACK input low. If AA is 0, the ACK input is ignored.
Wait states are still in effect. If no ACK is received, cycle terminates at end of wait state
period.
Note: Bit must be set to 0, to use ACK as burst indication signal during a burst transaction.
Chip Enable—bit allows CS operation for the corresponding CS pin. Must be high to allow
operation. Chip Select Control Register ME bit must also be high.
Enabled.
0 = Disabled, register writes can occur but no external access is generated.
Address Size field—defines the peripheral address bus size in bytes, and must be consistent
with the physical connections.
00 = 8 bits
01 = 16 bits
10 = 24 bits
11 = > 25 bits
Note: The combination of address size, data size, and transaction type (MX) must be
consistent with the physical peripheral connection. In a multiplexed transaction, the entire
address is driven, regardless of the address size field.
Data Size field—represents the peripheral data bus size (in bytes):
00 =1Byte
01 = 2 Bytes
10 = 3 Bytes (Not Supported)
11 = 4Bytes
Bank bits—are reflected on external AD lines (AD[26:25]) during address tenure of a
multiplexed transaction. Register bit 24 is the msb and appears on AD[26].
Wait state Type bits—define application of wait states contained in WaitP and WaitX fields,
as follows:
00 = WaitX is applied to Read and Write cycles (WaitP is ignored)
01 = WaitX is applied to Read cycles, WaitP is applied to Write cycles
10 = WaitX is applied to Reads, WaitP/WaitX (16-bit value) is applied to Writes
11 = WaitP/Waitx (as a full 16-bit value) is applied to Reads and Writes
MPC5200B Users Guide, Rev. 1
Description
Freescale Semiconductor