Freescale Semiconductor MPC5200B User Manual page 170

Bits Name
— Main_Mask[x]
15 Main_Mask0
— —
16 Main_Mask1
17 Main_Mask2
18 Main_Mask3
19 Main_Mask4
20 Main_Mask5
21 Main_Mask6
22 Main_Mask7
23 Main_Mask8
24 Main_Mask9
25 Main_Mask10
26 Main_Mask11
27 Main_Mask12
28 Main_Mask13
29 Main_Mask14
30 Main_Mask15
31 Main_Mask16
Note:
1. Setting these bits prevents an interrupt being presented to the masked sources e300 core pins. Encoded status
indications (MSe in Reg9) are therefore suppressed, but the binary all status bits (MSa in RegB) are active as long as
the source module is presenting an active input to the Interrupt Controller. Masking IRQ[1:3], is redundant with External
ENA bits in Reg4, but both masks are applied.
2. Slice Timer 1 is hard-coded and neither bank nor priority adjustable.
Freescale Semiconductor
To mask/accept individual main interrupt sources (as opposed to peripheral or critical
interrupt sources). This masking is in addition to interrupt enables, which may exist in each
source module.
0=Default. Accept interrupt from source module.
1=Ignore interrupt from source module.
Take care if masking LO_int, which is a collection of multiple Peripheral sources in a single
presentation. Masking LO_int essentially prevents any LO Peripheral from generating an
interrupt, even when those interrupts are enabled (i.e., unmasked) in Per_Mask, Reg0.
Important—See Note 1.
Slice Timer 1, which is hardwired to SMI interrupt output. See Note 2.
Interrupt sources below are bank/priority programmable (in Reg6 and Reg7).
IRQ[1] (IRQ[1] input pin interrupt)
IRQ[2] (IRQ[2] input pin interrupt)
IRQ[3] (IRQ[3] input pin interrupt)
LO_int (source programmable from Peripheral ints)
RTC_pint (Real time clock, periodic interrupt)
RTC_sint (Real time clock, stopwatch and alarm interrupt)
GPIO_std (collected GPIO interrupts, non-WakeUp)
GPIO_wkup (collected WakeUp interrupts)
TMR0 (internal Timer resource)
TMR1 (internal Timer resource)
TMR2 (internal Timer resource)
TMR3 (internal Timer resource)
TMR4 (internal Timer resource)
TMR5 (internal Timer resource)
TMR6 (internal Timer resource)
TMR7 (internal Timer resource)
MPC5200B Users Guide, Rev. 1
Description
Interrupt Controller
7-11