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Initialization Sequence
FCE
False
Hash Search
Group Table
Match
False
ar_em_b = 1
ar_hm_b = 1
NOTES:
FCE - field in R_CNTRL register (Flow Control Enable)
AR_EM_B - bit in RECV.AR_DONE register (address recognition exact match bar)
AR_HM_B - bit in RECV.AR_DONE register (address recognition hash match bar)
I/G - Individual/Group bit in Destination Address (least significant bit in first byte received in MAC frame)
Figure 14-3. Ethernet Address Recognition - microcode decisions
The hash table algorithm used in the group and individual hash filtering operates as follows. The 48-bit destination address is mapped into
one of 64 bits which are represented by 64 bits stored in GADDR1,2 (group address hash match) or IADDR1,2 (individual address hash
match). This mapping is performed by passing the 48-bit address through the on-chip 32-bit CRC generator and selecting the 6 most
significant bits of the CRC-encoded result to generate a number between 0 and 63. The MSB of the CRC result selects GADDR1 (MSB = 1)
or GADDR2 (MSB = 0). The least significant 5 bits of the hash result select the bit within the selected register. If the CRC generator selects
a bit that is set in the hash table, the frame is accepted; otherwise, it is rejected.
For example, if eight group addresses are stored in the hash table and random group addresses are received, the hash table prevents roughly
56/64 (or 87.5%) of the group address frames from reaching memory. Those that do reach memory must be further filtered by the processor
to determine if they truely contain one of the eight desired addresses.
The effectiveness of the hash table declines as the number of addresses increases.
The hash table registers must be initialized by the user. The user may compute the hash for a particular address in software. The CRC32
polynomial to use in computing the hash is:
32
X
A table of example Destination Addresses and corresponding hash values is included below for reference.
14-40
Group
True
?
False
Pause Address
?
True
?
ar_em_b = 1
ar_hm_b = 0
26
23
22
16
12
+
X
+
X
+
X
+
X
+
X
MPC5200B Users Guide, Rev. 1
Receive Address
Recognition
Individual
I/G Address
?
True
Hash Search
Individual Table
ar_em_b = 0
ar_hm_b = 1
True
Match
?
False
ar_em_b = 1
ar_em_b = 1
ar_hm_b = 1
ar_hm_b = 0
11
10
8
7
5
+
X
+
X
+
X
+
X
+
X
+
False
True
Exact Match
?
ar_em_b = 0
ar_hm_b = 1
4
2
X
+
X
+
X
+
1
Freescale Semiconductor
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