Freescale Semiconductor MPC5200B User Manual page 5

Table Of Contents
Paragraph
Number
7.3.2.1.16
7.3.2.2
7.3.2.2.1
7.3.2.2.2
7.3.2.2.3
7.3.2.2.4
7.3.2.2.5
7.3.2.2.6
7.3.2.2.7
7.3.2.2.8
7.3.2.2.9
7.3.2.2.10
7.4 General Purpose Timers (GPT) ..............................................................................................................................7-53
7.4.1 Timer Configuration Method ............................................................................................................................7-53
7.4.2 Mode Overview ................................................................................................................................................7-54
7.4.3 Programming Notes ..........................................................................................................................................7-54
7.4.4 GPT Registers-MBAR + 0x0600 ...................................................................................................................7-54
7.4.4.1
7.4.4.2
7.4.4.3
7.4.4.4
7.5 Slice Timers .............................................................................................................................................................7-61
7.5.1 SLT Registers-MBAR + 0x0700 ....................................................................................................................7-61
7.5.1.1
7.5.1.2
7.5.1.3
7.5.1.4
7.6 Real-Time Clock .....................................................................................................................................................7-64
7.6.1 Real-Time Clock Signals ..................................................................................................................................7-65
7.6.2 Programming Note ............................................................................................................................................7-65
7.6.3 RTC Interface Registers-MBAR + 0x0800 ....................................................................................................7-65
7.6.3.1
7.6.3.2
7.6.3.3
7.6.3.4
7.6.3.5
7.6.3.6
7.6.3.7
7.6.3.8
7.6.3.9
8.1 Overview ...................................................................................................................................................................8-1
8.2 Terminology and Notation ........................................................................................................................................8-1
8.1.1 "Endian"-ness .....................................................................................................................................................8-1
8.3 Features .....................................................................................................................................................................8-2
8.3.1 Devices Supported ..............................................................................................................................................8-3
8.4 Functional Description ............................................................................................................................................8-11
8.4.1 External Signals (SDRAM Side) ......................................................................................................................8-11
8.4.2 Block Diagram ..................................................................................................................................................8-12
8.4.3 Transfer Size .....................................................................................................................................................8-12
8.4.4 Commands ........................................................................................................................................................8-13
8.4.4.1
8.4.4.2
TOC-4
GPS GPIO Simple Interrupt Status Register-MBAR + 0x0B3C ......................................................7-44
WakeUp GPIO Registers-MBAR+0x0C00 ............................................................................................7-45
GPW WakeUp GPIO Enables Register-MBAR + 0x0C00 ...............................................................7-46
GPW WakeUp GPIO Open Drain Emulation Register -MBAR + 0x0C04 ......................................7-46
GPW WakeUp GPIO Data Direction Register-MBAR + 0x0C08 ....................................................7-47
GPW WakeUp GPIO Data Value Out Register -MBAR + 0x0C0C .................................................7-48
GPW WakeUp GPIO Interrupt Enable Register-MBAR + 0x0C10 .................................................7-48
GPW WakeUp GPIO Individual Interrupt Enable Register -MBAR + 0x0C14 ...............................7-49
GPW WakeUp GPIO Interrupt Types Register-MBAR + 0x0C18 ...................................................7-50
GPW WakeUp GPIO Master Enables Register -MBAR + 0x0C1C .................................................7-51
GPW WakeUp GPIO Data Input Values Register -MBAR + 0x0C20 .............................................7-52
GPW WakeUp GPIO Status Register-MBAR + 0x0C24 ..................................................................7-53
GPT 0 Enable and Mode Select Register-MBAR + 0x0600 ...................................................................7-55
GPT 0 Counter Input Register-MBAR + 0x0604 ....................................................................................7-58
GPT 0 PWM Configuration Register-MBAR + 0x0608 .........................................................................7-59
GPT 0 Status Register-MBAR + 0x060C ................................................................................................7-60
SLT 0 Terminal Count Register-MBAR + 0x0700 .................................................................................7-62
SLT 0 Control Register-MBAR + 0x0704 ..............................................................................................7-62
SLT 0 Count Value Register-MBAR + 0x0708 ......................................................................................7-63
SLT 0 Timer Status Register-MBAR + 0x070C .....................................................................................7-64
RTC Time Set Register-MBAR + 0x0800 ..............................................................................................7-66
RTC Date Set Register-MBAR + 0x0804 ...............................................................................................7-67
RTC New Year and Stopwatch Register-MBAR + 0x0808 ....................................................................7-68
RTC Alarm and Interrupt Enable Register-MBAR + 0x080C ................................................................7-68
RTC Current Time Register-MBAR + 0x0810 .......................................................................................7-69
RTC Current Date Register-MBAR + 0x0814 ........................................................................................7-70
RTC Alarm and Stopwatch Interrupt Register-MBAR + 0x0818 ...........................................................7-70
RTC Periodic Interrupt and Bus Error Register-MBAR + 0x081C .........................................................7-71
RTC Test Register/Divides Register-MBAR + 0x0820 ..........................................................................7-72
Chapter 8 SDRAM Memory Controller
Load Mode/Extended Mode Register Command .......................................................................................8-13
Precharge All Banks Command .................................................................................................................8-14
MPC5200B Users Guide, Rev. 1
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Freescale Semiconductor