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Functional Description
The min and max symbol limits shown in the following sections (Invalid Passive Bit - Valid BREAK Symbol) and figures
Figure
20-9) refer to the values listed in
•
Invalid Passive Bit
If the passive to active transition beginning the next data bit or symbol occurs between the active to passive transition beginning the
current data bit or symbol and T
Active
Passive
T
rvp1(Min)
Active
Passive
T
rvp1(Min)
Active
Passive
Active
Passive
•
Valid Passive Logic Zero
If the passive to active transition beginning the next data bit or symbol occurs between T
would be considered a logic zero. See
•
Valid Passive Logic One
If the passive to active transition beginning the next data bit or symbol occurs between T
would be considered a logic one. See
•
Valid EOD Symbol
If the passive to active transition beginning the next data bit or symbol occurs between T
would be considered a valid EOD symbol. See
20-22
Table 20-13 throughTable
, the current bit would be invalid. See
rvp1(Min)
200µs
128µs
64µs
T
rvp1(Max)
T
rvp2(Min)
Figure 20-6. J1850 VPW Passive Symbols
Figure
20-6(2).
Figure
20-6(3).
Figure
MPC5200B Users Guide, Rev. 1
20-18.
Figure
T
rvp2(Max)
T
T
rvp3(Min)
rvp3(Max)
20-6(4).
(Figure 20-6
20-6(1).
(1) Invalid Passive
Bit
(2) Valid Passive
Logic Zero
(3) Valid Passive
Logic One
(4) Valid EOD
Symbol
and T
, the current bit
rvp1(Min)
rvp1(Max)
and T
, the current bit
rvp2(Min)
rvp2(Max)
and T
, the current symbol
rvp3(Min)
rvp3(Max)
Freescale Semiconductor
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