Table of Contents
Advertisement
11.7.4.3
Multiword DMA Transactions
Multiword DMA transactions differ from PIO mode transactions in three ways:
1.
Data transfers are done using a drive DMA and a host DMA (optional).
2.
Handshaking is done with DMARQ and DMACK, no address is necessary.
3.
Interrupts do not occur after every sector for multi-sector transfers
11.7.4.3.1
Class 4—DMA Command
Figure 11-9
shows the DMA timing diagram. The DMA command (Read DMA, Write DMA) is as follows:
1.
HOST: Set up HOST DMA (in ATA Host Controller or system DMA).
2.
HOST: Write to ATA control/command block registers to setup drive DMA.
3.
HOST: Write to ATA control/command block registers to set up data read/write.
4.
HOST: Write to ATA command register to execute the read/write command.
5.
DRIVE: Assert DMARQ.
6.
HOST: When DMARQ is asserted, assert DMACK.
7.
DRIVE: Read sector from physical medium to sector buffer.
8.
DRIVE: Transfer data to HOST using DMA handshaking.
9.
Repeat steps 7–8 as needed for multiple sectors.
10. DRIVE: De-assert DMARQ.
11. HOST: De-assert DMACK.
12. DRIVE: Interrupt HOST.
13. HOST: Stop HOST DMA.
14. HOST: Read ATA control/command block registers to get status.
15. DRIVE: Clear interrupt after reading status register.
Host
Set Up
DMA
Drive
DRDY
BSY
IEN
11.7.4.4
Ultra DMA Protocol
The Ultra DMA protocol has the following commands:
•
READ DMA
•
WRITE DMA
The host selects the Ultra DMA protocol as follows:
•
Write 01000b to upper 5 bits ([7:3]) of sector count register to select ultra DMA protocol. Write desired mode value to lower 3 bits
([2:0]) of sector count register to set ultra DMA transfer mode (mode 0=000b, mode 1=001b, etc.).
•
Write sub-command code 03h to features register to set transfer mode based on value in sector count register.
•
Write command code EFh to command register to execute SET FEATURES command, which sets the data transfer protocol to ultra
DMA with desired mode.
When enabled, the ultra DMA protocol is used instead of the multiword DMA protocol.
Freescale Semiconductor
Set Up
Command
/Registers
Read
Sector
Figure 11-9. Timing Diagram—DMA Command (Class 4)
MPC5200B Users Guide, Rev. 1
Reset
Carry out DMA
DMA
Read
Sector
UNDEFINED
UNDEFINED
ATA Bus Background
Reset
Status
11-35
Advertisement
Table of Contents
