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BestComm DMA Registers—MBAR+0x1200
Bit
Name
9
High En
10
Hold
11
—
12-15
AS[3:0]
16:31
TCR1
13.15.9
SDMA Task Control 2 Register—MBAR + 0x1220
SDMA Task Control 3 Register—MBAR + 0x1222
msb 0
1
R
W
RESET:
0
0
16
17
R
W
RESET:
0
0
Bit
Name
0:15
TCR2
16:31
TCR3
13-10
High-Enable - High Priority Task Enable
0 = Normal task enable control
1 = High priority task enable control
This bit can be set or cleared by the programmer at any time. This bit enables the SDMA
to give priority to the enabled task function over running a task. At system reset, this bit is
cleared.
Hold Init Num- Hold initiator number
0 = Allow the SDMA engine to update initiator number for task
1 = Keep current initiator number.
This bit allows the initiator number to be set by the programmer and held for the complete
task. The SDMA can not overwrite the programmed initiator except for the use of the
always initiator which is contained in a separate control bit.
Reserved
ASNum[3:0] - Auto-Start Task Number
These four bits contain the task number which will be auto-started when the Auto-Start
control bit is set. At system reset, these bits are cleared.
Task control register for task 1. Same bit layout as for TCR0
Table 13-9. SDMA Task Control 2 Register
SDMA Task Control 3 Register
2
3
4
5
6
0
0
0
0
0
18
19
20
21
22
0
0
0
0
0
Task control register for task 2. Same bit layout as for TCR0
Task control register for task 3. Same bit layout as for TCR0
MPC5200B Users Guide, Rev. 1
Description
7
8
9
10
11
TCR2
0
0
0
0
23
24
25
26
27
TCR3
0
0
0
0
Description
12
13
14
15
0
0
0
0
0
28
29
30
31 lsb
0
0
0
0
0
Freescale Semiconductor
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