Freescale Semiconductor MPC5200B User Manual page 552

15.2.37 Rx FIFO Last Write Frame PTR (0x7C)—RFLWFPTR
msb 0 1
R Reserved
W
RESET: 0 0
Bit Name
0:3 —
4:15 LFP
15.2.38 Tx FIFO Data (0x80)—TFDATA
Read - write register to access the internal TX FIFO Data register. Write to this register write data to the transmit FIFO. Additional the register
provide the possibility to read data back from the TX FIFO for debug issues. For more informations about the data format see
Tx Buffer Register (0x0C)—TB.
15.2.39 Tx FIFO Status (0x84)—TFSTAT
For additional informations about the FIFO related status bits see
To make sure that the PSC never lost the data in the FIFO, the PSC controller avoid writing to a full
FIFO or reading from an empty FIFO. Therefore the status bits in the FIFO STAT register never
reports an ERROR, UF or OF state. The
msb 0 1
R Reserved
W
RESET: 0 0
Bit Name
0:3 —
4:7 Frame[3:0]
8 —
9 Error
10 UF
11 OF
12 FR
13 FULL
Freescale Semiconductor
PSC Registers—MBAR + 0x2000, 0x2200, 0x2400, 0x2600, 0x2800, 0x2C00
Table 15-65. Rx FIFO Last Write Frame PTR (0x7C)
2 3 4 5 6
0 0 0 0 0
Reserved
Last Frame Pointer. Not applicable to PSC FIFOs, since the PSCs do not recognize frame
formats in the serial data stream.
SR
Table 15-66. Tx FIFO STAT (0x84)
2 3 4 5 6
0 0 0 0 0
Reserved
Frame indicator. Not applicable to PSC FIFOs, since the PSCs do not recognize frame
formats in the serial data stream.
Reserved
FIFO error. A FIFO error has occurred due to either underflow, overflow, or read or write
pointer out of bounds.This bit is cleared by writing 1 to it.
Underflow. The read pointer has surpassed the write pointer due to the FIFO having been
read when it contained no data. This bit is cleared by writing 1 to it.
Overflow. The write pointer has surpassed the read pointer due to the FIFO having been
written when it was already completely full of data. This bit is cleared by writing 1 to it.
Frame ready. Not applicable to PSC FIFOs, since the PSCs do not recognize frame formats
in the serial data stream.
Full. The FIFO is completely full of data.
MPC5200B Users Guide, Rev. 1
7 8 9 10
LFP
0 0 0 0
Description
Section 15.2.3, Status Register (0x04) — SR.
NOTE
register reports these errors.
7 8 9 10
Rese Error UF
rved
0 0 0 0
Description
11 12 13 14 15 lsb
0 0 0 0
Section 15.2.7,
11 12 13 14 15 lsb
OF FR FULL
0 0 0 0
0
0
15-41